IO672 Pin Mapping / IO672 / MIL-STD-1553 / Communication Protocols / Speedgoat I/O Blockset

v10.0.1.x for R2026a

IO672 Pin Mapping

IO672 Pin Mapping — Reference information about the I/O module connector

Pin	Signal	Pin	Signal
1	Channel 1A (+)	35	-
2	Channel 1A (-)	36	-
3	Shield	37	RTADDR2_0
4	Ground	38	RTADDR2_1
5	Channel 1B (+)	39	-
6	Channel 1B (-)	40	-
7	Shield	41	Ground
8	RTADDR1_0	42	-
9	RTADDR1_1	43	-
10	Channel 2A (+)	44	RTADDR2_2
11	Channel 2A (-)	45	RTADDR2_3
12	Shield	46	Ground
13	Ground	47	Ground
14	Channel 2B (+)	48	-
15	Channel 2B (-)	49	-
16	Shield	50	Ground
17	RTADDR1_2	51	-
18	RTADDR1_3	52	-
19	Channel 3A (+)	53	-
20	Channel 3A (-)	54	Ground
21	Shield	55	RTADDR2_4
22	Ground	56	RTADDR2_P (Parity Bit)
23	Channel 3B (+)	57	-
24	Channel 3B (-)	58	-
25	Shield	59	-
26	~HWRT_EN	60	-
27	Ground	61	Ground
28	Channel 4A (+)	62	-
29	Channel 4A (-)	63	-
30	Shield	64	RTADDR1_4
31	Ground	65	RTADDR1_P (Parity Bit)
32	Channel 4B (+)	66	-
33	Channel 4B (-)	67	-
34	Shield	68	Ground

	Note
The Shield signals are tied together and are connected to the chassis. Connect these pins to the cable shield. The IO672 provides hardwired RT addressing on the first two channels. This mode is enabled by grounding HWRT_EN (pin 26).

Note

The Shield signals are tied together and are connected to the chassis. Connect these pins to the cable shield.

The IO672 provides hardwired RT addressing on the first two channels. This mode is enabled by grounding HWRT_EN (pin 26).