Documentation search search close
CONTENTS
https://www.speedgoat.com/help/slrt/page/icon_documentation.jpg
v10.0.1.x for R2026a
View other versions

I2C - Slave setup v1

I2C - Slave setup v1 — The I2C Slave setup block allows an identifier (slaveID) to be assigned to the I2CS blocks. In addition, the Register Addressing of the I2CS can be enabled or disabled.

Library

Simulink Real-Time - Speedgoat

Description

The I2C Slave setup block allows an identifier (slaveID) to be assigned to the I2CS blocks. In addition, the Register Addressing of the I2CS can be enabled or disabled.

If the Skip Register Addressing parameter is unchecked, the I2CS expects to receive a subindex byte prior to a write access on the registers of the I2CS. This subindex byte sets the pointer to the slave register address where the following read or write accesses will be done. An auto-increment flag is enabled so that multiple read or write accesses can be performed on consecutive register addresses. The encoding of the subindex byte for the I2CS implementation looks as follows: - bit 7-0: register address (0..256)

If Skip Register Addressing" is checked, the I2C slave block will no longer expect to receive a sub-index (register address) prior to a write access. Both accesses, write and read, will be performed on the first register of I2CS.

Ports

This block has no inputs and no outputs.

Parameters

Configurable I/O Module ID

This parameter associates a code module block with a configurable I/O module setup block. Set this value to match the Module ID defined in the setup block of the required configurable I/O module.

Channel

The number of the channel which this driver block entity will access. Only one channel per driver block can be addressed. You can specify channels in the range 1-N (N = the number of channels implemented in your specific configuration file defined in the Setup block).

Slave Identifier

A unique identifier for the slave. The identifier size is 7 bits.

Skip Register Addressing

If enabled, the register addressing of the I2CS is skipped. The I2C slave block will no longer expect to receive a sub-index (register address) prior to a write access. Both accesses, write and read, will be performed on the first register of I2CS.