Documentation

Configurable I/O Module ID

This parameter associates a code module block with a configurable I/O module setup block. Set this value to match the Module ID defined in the setup block of the required configurable I/O module.

Code Module Functionality

This box is only visible if your configuration file contains a code module that is using the analog inputs/outputs. If you want to use one of these analog code modules, you need to select the corresponding checkbox. The Analog setup block will then be automatically configured to support this analog code module. Parameters needing to be set to a specific value will be grayed out.

Analog input and output channels not reserved by an analog code module can still be used, but the channel group will be triggered by the code module. When the DMA interrupt is enabled, the whole channel group will be automatically disabled.

Analog Input Trigger - Enable Individual Trigger Settings

This checkbox selects between individual trigger settings per channel group or common trigger settings, which apply for all channels.

Trigger Settings - ADC Sample Trigger

The block supports up to four trigger options for the analog inputs depending on the settings of Enable Individual Trigger Settings and Enable DMA Interrupt

• Model Step At each model sample step the analog input channels are triggered and the driver actively waits until the analog data is converted and read back. The task execution time will depend on the number of analog input channels selected. This option is only available when Enable DMA Interrupt is not selected.

• I/O Module Clock The triggering of the analog channels is based on the internal clocking functionality. The ADC Sample Rate can be configured to the desired rate.

• I/O Module Internal Signal The triggering of the analog channels is based on I/O module internal signals. The available signals depend on what is supported in the corresponding configuration file.

• I/O Module Digital I/O The triggering of the analog channels is based on a configurable digital I/O pin. Both input and output signals can be used for triggering.

Read Value From Previous Model Step

At each model sample step the analog input data from the previous time step is read and new conversions of the enabled analog input channels are triggered, which will be read in the next model execution. This mode avoids the active wait time of the analog conversion and therefore has a lower task execution time.

ADC Sample Rate [Hz]

This parameter is used to configure the internal sampling clock of the ADC.

Internal Signal

This parameter is available if ADC Sample Trigger is set to I/O Module Internal Signal. A list of available internal trigger signals is shown in the drop-down menu. If no signal is available, then the selected configuration file does not include internal trigger signals; in this case choose a different trigger option.

Digital I/O Channel

This parameter is available if ADC Sample Trigger is set to I/O Module Digital I/O. Specify the digital I/O channel number to configure the corresponding signal as trigger signal. If the selected I/O line is configured as digital input in your model, an external signal can be connected for triggering. But the trigger signal routing also works for output signals and as well for code module functionality. For example if a digital line is configured as PWM-Trigger output signal, then the signal is also internally routed to the trigger input of the analog channels and can be used for triggering.

Oversampling Factor

Select the oversampling configuration: none, 2, 4, 8, 16, 32 or 64. If oversampling is active, the I/O module takes the selected number of samples and averages them to one sample. In Frame-Based mode, only every nth sample is transferred over DMA. In Sample-Based mode, the filter acts as a moving average, and the CPU reads out the latest value.

Enable DMA Interrupt

The analog input data read back is organized in frames and can be synchronized using an interrupt. Either a triggered subsystem or the whole model can be executed based on the DMA interrupt. This checkbox is only visible, when Enable Individual Trigger Settings is disabled.

Frame-Based Settings - Trigger Resolution [s]

This parameter is shown if Enable DMA Interrupt is checked. The parameter is disabled and cannot be changed and only shows the applicable time resolution of the ADC trigger signal. The ADC sample time will be rounded to an integer multiple of the Trigger Resolution.

Frame-Based Settings - ADC Sample Rate [Hz]

This parameter is available if Enable DMA Interrupt is checked. The ADC Sample Rate is used to configure the internal sampling clock, if Sample Trigger is set to I/O Module Clock. For the other ADC Trigger Settings it is used to calculate the expected block sample time.

Frame-Based Settings - Frame Size (samples/channel)

This parameter is available if Enable DMA Interrupt is checked.

Select how many samples are transferred from the module at each CPU model step. The block port signal of every channel becomes a vector with the same number of values, where the value at position 1 is taken first. Enter "-1" to allow the system to determine the frame size automatically based on the ADC Sample Rate and the Input Block Sample Time.

Frame-Based Settings - Input Block Sample Time [s]

This parameter is available if Enable DMA Interrupt is checked.

Define the base sample time at which the Analog input interrupt gets asserted. Enter "-1" to allow the system to determine the block sample time automatically based on the ADC Sample Rate and Frame Size.

Analog Output Trigger - DAC Sample Trigger

The block supports four trigger options for the analog outputs:

• Model Step At each model sample step, the analog values are written to the I/O module and the analog output channels get updated.

• I/O Module Clock The triggering of the analog channels is based on the internal clocking functionality. If Enable DMA Interrupt is checked, then the DAC Sample Rate can be configured; otherwise the DAC Sample Rate is set to the maximum achievable rate.

• I/O Module Internal Signal The triggering of the analog channels is based on I/O module internal signals. The available signals depend on what is supported in the corresponding configuration file.

• I/O Module Digital I/O The triggering of the analog channels is based on a configurable digital I/O pin. Both input and output signals can be used for triggering.

Internal Signal

This parameter is available if DAC Sample Trigger is set to I/O Module Internal Signal. A list of available internal trigger signals is shown in the drop-down menu. If no signal is available, then the selected configuration file does not include internal trigger signals; in this case choose a different trigger option.

Digital I/O Channel

This parameter is available if DAC Sample Trigger is set to I/O Module Digital I/O. Specify the digital I/O channel number to configure the corresponding signal as a trigger signal. If the selected I/O line is configured as a digital input in your model, an external signal can be connected for triggering. But the trigger signal routing also works for output signals and also for code module functionality. For example, if a digital line is configured as a PWM-Trigger output signal, then the signal is also internally routed to the trigger input of the analog channels and can be used for triggering.

Analog Output Trigger - Enable DMA Interrupt

The analog output data is written to the I/O module and synchronized using an interrupt to ensure continuous data. Either a triggered subsystem or the whole model can be executed based on the DMA interrupt.

Frame-Based Settings - FIFO Threshold

This parameter is available if Enable DMA Interrupt is checked. The FIFO Threshold determines when the interrupt is asserted to request new data from the CPU; this means that the interrupt is asserted as soon as only FIFO Threshold samples/channel remain. The threshold should be chosen such that enough samples are still in the FIFO to output on the DAC, while new data is requested and received from the CPU (this includes: trigger interrupt time, execution of CPU model step, DMA data transfer). The FIFO Threshold value must be equal to or less than the Frame Size value.

Frame-Based Settings - Trigger Resolution [s]

This parameter is shown if Enable DMA Interrupt is checked. The parameter is disabled and cannot be changed and only shows the applicable time resolution of the DAC trigger signal. The DAC sample time will be rounded to an integer multiple of the trigger resolution.

Frame-Based Settings - DAC Sample Rate [Hz]

This parameter is available if Enable DMA Interrupt is checked. The DAC Sample Rate is used to configure the internal sampling clock, if Sample Trigger is set to I/O Module Clock; otherwise it is used to calculate the expected block sample time.

Frame-Based Settings - Frame Size (samples/channel)

This parameter is available if Enable DMA Interrupt is checked.

Select how many samples are transferred to the module at each sample hit. The block port signal of every channel becomes a vector with the same number of values, where the value at position 1 is taken first. Enter "-1" to allow the system to determine the frame size automatically based on the DAC Sample Rate and Frame Size.

Frame-Based Settings - Output Block Sample Time [s]

This parameter is available if Enable DMA Interrupt is checked.

Define the base sample time at which the Analog output interrupt gets asserted. Enter "-1" to allow the system to determine the block sample time automatically based on the DAC Sample Rate and Frame Size.

The settings of the analog input channels are organized in four groups, corresponding to the four physical ADC chips on the I/O module

Signal Mode

Select between Single-Ended and Differential mode

Available Channels

Choose the active analog input channels by selecting the corresponding checkboxes.

Voltage Range

Differential mode: ±0.64 V, ±1.28 V, ±2.56 V, ±5.12 V, ±10.24 V, ±20.48 V, and ±24.576 V

Single-ended mode: ±0.64 V, ±1.28 V, ±2.56 V, ±5.12 V, ±10.24 V, and ±12.288 V (half resolution)

The voltage range can be configured for all channels of the same group or individually for each channel by checking the Set Voltage Range per Channel checkbox.

Set Voltage Range per Channel

Enable individual voltage range selection per channel for each input group.

Available Channels

Choose the active output channels by selecting the corresponding checkboxes. For each active channel, a separate row for the channel settings is displayed. For all the enabled code module functionalities, the corresponding channels will be automatically enabled.

Output Voltage Range

±2.5 V, ±5 V, ±10 V,

Initial Value [V]

Define the initial signal level present on the specific output after the application has been downloaded. The values can be set individually by entering the initial value for each channel according to the selected output range.

Reset to Initial Value

Define whether the initial value is also applied once the application has stopped. The behavior can be set individually for each channel using the checkbox.