Documentation search search close
CONTENTS
https://www.speedgoat.com/help/slrt/page/icon_documentation.jpg
v10.0.1.x for R2026a
View other versions

IO134 Usage Notes

IO134 Usage Notes — Usage information about the I/O module

DMA Setup

If DMA is enabled for analog input, then the model or the asynchronous subsystem where the module is located must be triggered by the module's interrupt.

This is required so that the sample hits of the blocks are synchronous to the module's DMA engine.

In DMA mode, the model must contain an Interrupt Setup block that triggers a subsystem or the model. Refer to the block documentation for more information.

Frame Trigger

The frame trigger starts the conversion of analog input data over DMA. The advantage of operating with the frame trigger is that the data frame can be smaller than the trigger signal.

Example: Input frames are the same size as the frame trigger

In this example, the analog input frames have the same size as the frame trigger. If the analog input frame size is 100 samples/channel, then the frame trigger clock divider must be 100. This results in a frame trigger with 100 conversions/trigger. With these settings, the IO134 module performs the analog conversions at an interval defined with the chosen conversion clock.

The overall behavior is the same as if the frame trigger had been disabled.

Example: Input frames are smaller than the frame trigger

In this example, the analog input frames are smaller than the frame trigger. The analog input frame size could, for example, be 40 samples/channel and the frame trigger clock divider could be 100. The result is a configuration where the system starts converting the analog input samples after a frame trigger. After 40 samples, the analog input frame is full, the ADC conversions are stopped and the data frame is transferred over DMA to the model in Simulink. During the other 60 conversion clocks, the module will not perform anymore conversions. The whole cycle will start again after the next frame trigger.

Manual Data Correction

Analog inputs can be calibrated manually by specifying offset- and gain-correction values. The correction values are set per channel and voltage range individually and are applied as follows:

  • Data is the digital value that would be used if the ADC Channels were ideal.

  • Data_Corrected is the corrected digital value that must be used with the real ADC Channels and DAC Channels

The correction values are stored as two's complement 16-bit wide values in the range –32768 to +32767. For improved accuracy, they are scaled to ¼ LSB (least significant bit). No correction is performed for GainCORR = 0 and OffsetCORR = 0. Please consult the hardware reference manual for additional information.

The calibration process is performed for an individual channel at a given voltage range. The following steps outline a procedure to calculate OffsetCORR and GainCORR for an analog input channel with input voltage range ±5 V. (A similar procedure can be followed for the calibration of other voltage ranges).

  1. Disable data correction

    1. Set the data correction method in the Simulink block to None.

  2. Estimate OffsetCORR

    1. Supply a 0 V-certified reference voltage to the input channel and record the reading

    2. Use the reading (OffsetMEASURE) to calculate OffsetCORR

      Offset_CORR =  Offset_MEAS/(LSB/4);

      (LSB denotes least significant bit and equates to LSB = full scale range/adc resolution. Please consult the hardware reference manual for additional information.)

  3. Estimate GainCORR

    1. Sequentially supply -5 V and 5 V (certified reference voltage) to the input channel and record the readings

    2. Use the readings (-5 V: voltage_m5, 5 V: voltage_p5) to calculate GainCORR

      voltageRange_target = +5 -(-5); % -> 10 V
voltageRange_measurement = voltage_p5 - voltage_m5;
Gain_CORR = (voltageRange_target - voltageRange_measurement)/(LSB/4);

  4. Verify the manual data correction

    1. In the Simulink block, set the data correction method to Manual and input OffsetCORR and GainCORR

    2. Supply some sample voltages and verify the readings. Make fine adjustments as needed

Inter-Module Synchronization Setup

With the help of inter-module synchronization, the IO132-IO135 range of modules allows for synchronous DMA usage of more than one module. Some of the possible use cases are listed below.

Conversion Signals

To use inter-module synchronization, the conversion signals must meet certain timing and voltage requirements. The requirements are listed below. Note that when inter-module synchronization is used with a module from the IO132-IO135 range, these requirements are taken care of automatically.

Conversion Clock

The conversion clock signal is an active-high pulse signal that determines the basic frequency of the data output or the acquisition of the modules.

Frame Trigger

The frame trigger signal is a divider of the conversion clock signal. It indicates the time when the DMA shifts the data in the desired direction. The first falling edge of the frame trigger also makes up the starting interrupt signal of the module.

Conversion Signal Requirements

The exact timing requirements for the inter-module synchronization are as follows:

Here is an example for the conversion signals exchanged between two IO132-IO135 I/O modules. The red signal is the conversion clock signal, the signal in blue is the frame trigger signal. The frame trigger clock divider is set to 10.

Hardware Setup

  • Front I/O:

    When using inter-module synchronization in Front I/O mode, connect all the concerned modules' DIO 1, DIO 3 and DIO 5 lines. In a case where only one conversion clock is used, the other conversion clock line can be omitted. However, the respective DIO line cannot be used for its original purpose.

  • Rear I/O:

    If all dedicated modules are to be connected via rear I/O connection, the DIO ports can all be used for their intended purpose. If you wish to upgrade your system to support rear I/O configuration, please contact Speedgoat to check whether your system supports rear I/O configuration.

Software Setup

  • Initiator and Target Modules in the Same Real-Time Target Machine

    When both the initiator module and a target module(s) are installed in the same machine, inter-module synchronization must be activated to use DMA on all modules.

  • Initiator and Target Modules in Separate Real-Time Target Machines

    Another use case for inter-module synchronization is the synchronous start of several real-time target machines. For this purpose, we need to set the relevant module on every target machine as model trigger. We then need to start the real-time target machine containing the target module first. The application will transition to the “running” state, without the model execution starting. This only happens when the machine gets the Frame Trigger signal from the real-time target machine containing the initiator module. All connected modules will then start to sample and output synchronously, on different machines.

  • PWM Signal from an External Source or a Speedgoat Configurable I/O Module as Synchronization Signal

    If the aforementioned conversion signal requirements are met, an external source or another module present inside or outside the dedicated real-time target machine can be used to trigger the IO132-IO135 modules set to target mode. Note that the exact bus/slot number must be specified at every instance to use the IO132-IO135 as interrupt trigger of your model or subsystem.