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v10.0.1.x for R2026a
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Interrupt - CoS v1

Interrupt - CoS v1 — The CoS (Change of State) interrupt driver block allows a change of state on an input of the configurable I/O module in order to trigger the Simulink model.

Library

Simulink Real-Time - Speedgoat

Description

The CoS interrupt driver block allows a change of state on an FPGA input to trigger the Simulink model.

Ports

This block has no inputs or outputs.

Parameters

Tab: Module setup
Configurable I/O Module ID

This parameter associates a code module block with a configurable I/O module setup block. Set this value to match the Module ID defined in the setup block of the required configurable I/O module.

Sample Time

Defines the base sample time at which this driver block gets its sample hit. This parameter can also be set to -1 for inherited sample time. The units are in seconds.

Tab: Interrupt
Debounce duration

The time during which the interrupt input signal is tested for validity. If the signal level does not change during the test duration, the Interrupt code module assumes that the signal value is stable and asserts the interrupt. To turn off the debouncing, enter the value 0. The duration is defined in number of FPGA clock ticks. The range is from 0 to 2^10 – 1 (0 to 1023).

Interrupt delay

Defines time that the tested (debounced) signal is delayed before the interrupt is asserted. To turn off the delay enter value 0. The interrupt delay is defined in number of FPGA clock ticks. The range is from 0 to 2^20 – 1 (0 to 1048575).

Polarity

Defines whether the signal's low-to-high (value 1) or high-to-low (value 0) transition produces an interrupt.